Dielectric materials in semiconductor devices in integrated circuits appear as gate dielectrics in field effect transistors (FET) and capacitor dielectric in dynamic random access memory (DRAM). The dimensions of these dielectrics are related directly to the performance of the semiconductor devices. To achieve faster responses and more complex functionalities, today's generations of integrated circuits become smaller and smaller in all directions, lateral sizes as well as thickness.
The performance of a dynamic random access memory (DRAM) device is related to the charge stored in its capacitor, which is directly proportional to its area and dielectric constant k and inversely proportional to its thickness. As the sizes decrease, to maintain adequate capacitance charges for a high performance DRAM device, a high k dielectric is highly desirable for a capacitor dielectric.
The speed of a semiconductor device is directly proportional to the response of a gate dielectric in a field effect transistor (FET) after a voltage is applied. The response of a gate dielectric is directly proportional to its dielectric constant k and inversely proportional to its thickness t. Thus, the need for a thin and high k dielectric is also highly desirable for a gate dielectric.
The primary material for gate dielectrics is silicon dioxide (SiO2) with a dielectric constant of about 4. As the device dimensions continue to be scaled down, the thickness of the silicon dioxide gate dielectric has reached the tunneling limit of 1.5-2 nm. Silicon dioxide films of less than 1.5 nm generally cannot be used as a gate dielectric in FET devices mainly because of the excessive power consumption due to the high leakage from the direct tunneling currents. There are also other fabrication and reliability concerns for such a very thin silicon dioxide film such as boron penetration, and charge injection damage.
Many high dielectric constant dielectric materials (high k dielectric) have been investigated as possible replacements for silicon dioxide but a suitable replacement has still not been found because of the many other stringent requirements such as low leakage current, formation of a good interface with silicon substrate, low thermal budget for the fabrication process, and device high channel mobility. Potential candidates include titanium oxide (TiO2), tantalum oxide (Ta2O5, k value between 9 and 27), aluminum oxide (Al2O3, k value about 9), zirconium oxide (ZrO2, k value between 10 and 25), hafnium oxide (HfO2, k value between 10 and 25), and various combinations and mixtures such as multilayers, multicomponents, and nanolaminates.
The current leading candidates for high k dielectric materials for gate dielectric applications are zirconium oxide and hafnium oxide. The bulk dielectric constant of these materials is about 20 to 25, meaning a thickness of about 5 to 6 nm of these materials is equivalent to a thickness of 1 nm of silicon dioxide.
Zirconium oxide films deposited via ALD show good insulating properties including high dielectric constant and low leakage. A major concern, however, is that it does not deposit directly on a hydrogen-terminated surface smoothly, but instead requires a thin layer of silicon dioxide for uniform initiation. For example, see Conley et al, “Atomic layer deposition of hafnium oxide using anhydrous hafnium nitrate”, Electrochemical and Solid-State Letters, 5 (5), C57,59 (2002) and the references cited therein. The presence of the thin silicon dioxide interfacial layer is not desirable because it is then very difficult to achieve a silicon dioxide equivalent thickness of 1nm. The hydrogen-terminated silicon surface is a silicon surface free of any native silicon oxide and the dangling bonds of silicon are terminated with hydrogen. The hydrogen-terminated silicon surface is the result of standard industry semiconductor cleaning processes. These standard cleaning processes are typically quick immersions of the silicon wafers into an HF solution to produce silicon surfaces that are hydrogen terminated, also known as hydrogen passivation.
Research on hafnium oxide indicates that smooth, uniform and amorphous hafnium oxide films can be deposited directly on hydrogen-terminated silicon surfaces under proper deposition conditions. A dielectric constant of 10.5 and a capacitance equivalent thickness of 2.1 nm have been achieved with a 5.7 nm thick hafnium oxide deposited directly on hydrogen-terminated silicon surface. This is a very desirable feature because it indicates that further research could further reduce the equivalent thickness to 1 nm or below. However, the deposited hafnium oxide films still suffer from various problems. One problem is its low crystallization temperature, resulting in a much lower thermal budget for the fabrication process of the semiconductor devices. Another problem is that the quality of the interface of hafnium oxide and silicon substrate is relatively poor with respect to silicon dioxide/silicon interface and that results in low channel mobility when integrated into semiconductor device structures.
It has been shown that thin alternating layers of insulators can produce a composite film (or nanolaminate) whose properties can be adjusted. Previous research of Zhang et al., “High permittivity thin film nanolaminates”, Journal of Applied Physics, Vol. 87, No 4, 15 Feb. 2000, indicated that nanolaminates of Ta2O5—HfO2, ZrO2—HfO2, and Ta2O5—ZrO2 show different properties depending on the thickness of the nanolaminates.
Previous research also indicated that the properties of the high k dielectric films could be modified with the doping of aluminum. For example, Ma et al., U.S. Pat. No. 6,060,756, “Aluminum-doped zirconium dielectric film transistor structure and deposition method for same,” the content being incorporated herein by reference, discloses that the doping of a high dielectric constant material such as zirconium oxide with a trivalent metal such as aluminum increases the crystallized temperature so that the resulting film remains amorphous under high temperature processing conditions. Zirconium oxide films doped with aluminum produce an amorphous film with better uniformity, but with slightly lower dielectric constant.
From the process side, one of the basic deposition processes of modern semiconductor device structures is Chemical Vapor Deposition (CVD). In CVD, a combination of precursor gases or vapors flows over the wafer surface at an elevated temperature. Reactions then take place at the hot surface where deposition occurs. The temperature of the wafer surface is an important factor in CVD deposition, as it affects the deposition reactions of the precursors and also the uniformity of deposition over the large wafer surface. CVD typically requires high temperature, in the order of 400 to 800° C. CVD at lower temperature tends to produce low quality films in terms of uniformity and impurities. To lower the deposition temperature, the precursors can be excited with a plasma energy in a plasma enhanced chemical vapor deposition (PECVD) process. The precursors and the process conditions of CVD processes are carefully chosen to avoid gas phase reaction, which leads to particle generation. The uniformity of CVD film is also a function of process conditions, and in general is not very good at very thin films.
Another deposition technology known as atomic layer deposition (ALD or ALCVD) has markable improvement over CVD technology in terms of gas phase reaction and thin film uniformity. In ALD, the precursor vapors are injected into the process chamber in alternating sequences: precursor, purge gas, reactant, purge gas with the precursor adsorbing onto the substrate and then subsequently reacting with the reactant. There are various modifications of the ALD processes, but the basic ALD processes all contain two distinct properties: alternating injection of precursors and the saturation of the precursor adsorption.
In ALD process, a precursor is delivered into the chamber and adsorbed onto the substrate surface. The adsorption temperature is lower than the reaction temperature of CVD process and the adsorbed amount is somewhat less sensitive to the wafer surface temperature. Then the precursor is shut off and a purge gas is delivered into the chamber to purge all the remaining precursor in the chamber volume. A reactant is then delivered into the chamber to react with the adsorbed precursor to form the desired film. Then another purge gas is delivered into the chamber to purge all the remaining reactant vapor in the chamber volume. By alternating precursors and reactants in the vapor stream, the possibility of gas phase reaction is minimized, allowing a wide range of possible precursors not usable with CVD technology. Also because of the adsorption mechanism, the deposited film is extremely uniform because once the surface is saturated, the additional precursors and reactants will not further adsorb or react and will just be exhausted away.
The precursor requirements of ALD are different from those of CVD because of the different deposition mechanisms. ALD precursors must have a self-limiting effect so that only a monolayer of precursor is adsorbed on the substrate. Because of this self-limiting effect, only one monolayer or a sub-monolayer is deposited per cycle, and additional precursor will not be deposited on the grown layer even when excess precursor or additional time is supplied. The precursors designed for ALD must readily adsorb at bonding sites on the deposited surface in a self-limiting mode. Once adsorbed, the precursors must react with the reactants to form the desired film. In CVD, the precursors and the reactants arrive at the substrate together and the film is deposited continuously from the reaction of the precursors with the reactants. The deposition rate in CVD process is proportional to the precursor and reactant flow rate and to the substrate temperature. In CVD the precursor and the reactant must react at the deposited surface simultaneously to form the desired film.
Thus many useful CVD precursors are not viable as ALD precursors and vice versa. It is not trivial or obvious to select a precursor for the ALD method.
Nitrate (NO3) ligand is a powerful oxidizing and nitriding agent, and capable of reacting strongly with many compounds. Gates et al., U.S. Pat. No. 6,203,613, “Atomic layer deposition with nitrate containing precursors”, discloses an ALD method specifically using metal nitrate precursors in conjunction with oxidizing, nitriding and reducing co-reactants to deposit oxide, nitride and metal films, respectively.
Similar to Gates et al., published works also show the ALD deposition of zirconium oxide using zirconium nitrate precursor together with an oxidizing agent such as water, or methanol, and the ALD deposition of hafnium oxide using hafnium nitrate precursor together with an oxidizing agent such as water, or methanol. For example, see Ono et al., in U.S. Pat. No. 6,420,279, “Method of using atomic layer deposition to deposit a high dielectric constant material on a substrate”, the content being incorporated herein by reference. However; our research has shown that hafnium oxide deposited via hafnium nitrate together with an oxidizing agent has a dielectric constant lower than expected, probably due to the oxygen-rich nature of the hafnium oxide film.
It is advantageous to reduce the oxygen content of hafnium oxide to improve the quality of the hafnium oxide film.
It is advantageous to use hafnium nitrate on hydrogen-terminated silicon surface for a smooth uniform initiation of a hafnium oxide layer.
It is advantageous to form nanolaminates to modify the film characteristics by changes in composition.
It is advantageous to incorporate aluminum oxide to hafnium oxide for possible modification of the composite film properties such as better interface quality, and lower leakage current.
It is advantageous to incorporate aluminum impurities to increase the crystallization temperature of metal oxide.